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2-47 XC4000 logic cell array family a product specifications description the XC4000 family of field-programmable gate arrays (fpgas) provides the benefits of custom cmos vlsi, while avoiding the initial cost, time delay, and inherent risk of a conventional masked gate array. the XC4000 family provides a regular, flexible, program- mable architecture of configurable logic blocks (clbs), interconnected by a powerful hierarchy of versatile routing resources, and surrounded by a perimeter of program- mable input/output blocks (iobs). XC4000 devices have generous routing resources to ac- commodate the most complex interconnect patterns. they are customized by loading configuration data into the inter- nal memory cells. the fpga can either actively read its configuration data out of external serial or byte-parallel prom (master modes), or the configuration data can be written into the fpga (slave and peripheral modes). the XC4000 family is supported by powerful and sophisti- cated software, covering every aspect of design: from schematic entry, to simulation, to automatic block place- ment and routing of interconnects, and finally the creation of the configuration bit stream. since xilinx fpgas can be reprogrammed an unlimited number of times, they can be used in innovative designs where hardware is changed dynamically, or where hard- ware must be adapted to different user applications. fpgas are ideal for shortening the design and development cycle, but they also offer a cost-effective solution for production rates well beyond 1000 systems per month. for a detailed description of the device features, architec- ture, configuration methods and pin descriptions, see pages 2-9 through 2-45. features ? third generation field-programmable gate arrays C abundant flip-flops C flexible function generators C on-chip ultra-fast ram C dedicated high-speed carry-propagation circuit C wide edge decoders (four per edge) C hierarchy of interconnect lines C internal 3-state bus capability C eight global low-skew clock or signal distribution network ? flexible array architecture C programmable logic blocks and i/o blocks C programmable interconnects and wide decoders ? sub-micron cmos process C high-speed logic and interconnect C low power consumption ? systems-oriented features C ieee 1149.1-compatible boundary-scan logic support C programmable output slew rate (2 modes) C programmable input pull-up or pull-down resistors C 12-ma sink current per output C 24-ma sink current per output pair ? configured by loading binary file C unlimited reprogrammability C six programming modes ? xact development system runs on 386/486-type pc, nec pc, apollo, sun-4, and hewlett-packard 700 series C interfaces to popular design environments like viewlogic, mentor graphics and orcad C fully automatic partitioning, placement and routing C interactive design editor for design optimization C 288 macros, 34 hard macros, ram/rom compiler device xc4003 xc4005 xc4006 xc4008 xc4010/10d xc4013 xc4020 xc4025 appr. gate count 3,000 5,000 6,000 8,000 10,000 13,000 20,000 25,000 clb matrix 10 x 10 14 x 14 16 x 16 18 x 18 20 x 20 24 x 24 28 x 28 32 x 32 number of clbs 100 196 256 324 400 576 784 1,024 number of flip-flops 360 616 768 936 1,120 1,536 2,016 2,560 max decode inputs (per side) 30 42 48 54 60 72 84 96 max ram bits 3,200 6,272 8,192 10,368 12,800* 18,432 25,088 32,768 number of iobs 80 112 128 144 160 192 224 256 *xc4010d has no ram table 1. the XC4000 family of field-programmable gate arrays
2-48 XC4000 logic cell array family absolute maximum ratings symbol description units v cc supply voltage relative to gnd C0.5 to +7.0 v v in input voltage with respect to gnd C0.5 to v cc +0.5 v v ts voltage applied to 3-state output C0.5 to v cc +0.5 v t stg storage temperature (ambient) C65 to + 150 c t sol maximum soldering temperature (10 s @ 1/16 in. = 1.5 mm) + 260 c t j junction temperature + 150 c note: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those listed under recommended operating conditions is not implied. exposure to absolute maximum ratings conditions for extended periods of time may affect device reliability. operating conditions symbol description min max units v cc supply voltage relative to gnd commercial 0 c to 85 c junction 4.75 5.25 v supply voltage relative to gnd industrial -40 c to 100 c junction 4.5 5.5 v supply voltage relative to gnd military C55 c to 125 c case 4.5 5.5 v v ih high-level input voltage (XC4000 has ttl-like input thresholds) 2.0 v cc v v il low-level input voltage (XC4000 has ttl-like input thresholds) 0 0.8 v t in input signal transition time 250 ns dc characteristics over operating conditions symbol description min max units v oh high-level output voltage @ i oh = C4.0 ma, v cc min 2.4 v v ol low-level output voltage @ i ol = 12.0 ma, v cc min (note 1) 0.4 v i cco quiescent lca supply current (note 2) 10 ma i il leakage current C10 +10 m a c in input capacitance (sample tested) 15 pf i rin pad pull-up (when selected) @ v in = 0v (sample tested) 0.02 0.25 ma i rll horizontal long line pull-up (when selected) @ logic low 0.2 2.5 ma note: 1. with 50% of the outputs simultaneously sinking 12 ma. 2. with no output current loads, no active input or longline pull-up resistors, all package pins at v cc or gnd, and the lca configured with a makebits tie option. at junction temperatures above those listed as operating conditions, all delay parameters increase by 0.35% per c.
2-49 wide decoder switching characteristic guidelines testing of the switching parameters is modeled after testing methods specified by mil-m-38510/605. all devices are 100% functionally tested. since many internal timing parameters cannot be measured directly, they are derived from benchmark timing patterns. the following guidelines reflect worst-case values over the recommended operating conditions. for more detailed, more precise, and more up-to-date timing information, use the values provided by the xact timing calculator and used in the simulator. speed grade -6 -5 -4 description symbol device max max max units full length, both pull-ups, t waf xc4003 9.0 8.0 5.0 ns inputs from iob i-pins xc4005 10.0 9.0 6.0 ns xc4006 11.0 10.0 7.0 ns xc4008 12.0 11.0 8.0 ns xc4010 13.0 12.0 9.0 ns xc4013 15.0 14.0 11.0 ns xc4025 21.0 19.0 17.0 ns full length, both pull-ups t wafl xc4003 12.0 11.0 7.0 ns inputs from internal logic xc4005 13.0 12.0 8.0 ns xc4006 14.0 13.0 9.0 ns xc4008 15.0 14.0 10.0 ns xc4010 16.0 15.0 11.0 ns xc4013 18.0 17.0 13.0 ns xc4025 24.0 23.0 20.0 ns half length, one pull-up t wao xc4003 9.0 8.0 6.0 ns inputs from iob i-pins xc4005 10.0 9.0 7.0 ns xc4006 11.0 10.0 8.0 ns xc4008 12.0 11.0 9.0 ns xc4010 13.0 12.0 10.0 ns xc4013 15.0 14.0 12.0 ns xc4025 21.0 19.0 18.0 ns half length, one pull-up t waol xc4003 12.0 11.0 8.0 ns inputs from internal logic xc4005 13.0 12.0 9.0 ns xc4006 14.0 13.0 10.0 ns xc4008 15.0 14.0 11.0 ns xc4010 16.0 15.0 12.0 ns xc4013 18.0 17.0 14.0 ns xc4025 24.0 23.0 21.0 ns note: these delays are specified from the decoder input to the decoder output. for pin-to-pin delays, add the input delay (t pid ) and output delay (t opf or t ops ), as listed on page 2-52. preliminary
2-50 XC4000 logic cell array family speed grade -6 -5 -4 description symbol device max max max units global signal distribution from pad through primary buffer, to any clock k t pg xc4003 7.8 5.8 5.1 ns xc4005 8.0 6.0 5.5 ns xc4006 8.2 6.2 5.7 ns xc4008 8.6 6.6 6.1 ns xc4010 9.0 7.0 6.5 ns xc4013 10.0 8.0 7.5 ns xc4025 17.0 15.0 14.5 ns from pad through secondary buffer, to any clock k t sg xc4003 8.8 6.8 6.3 ns xc4005 9.0 7.0 6.7 ns xc4006 9.2 7.2 6.9 ns xc4008 9.6 7.6 7.3 ns xc4010 10.0 8.0 7.7 ns xc4013 11.0 9.0 8.7 ns xc4025 18.0 16.0 15.7 ns speed grade -6 -5 -4 description symbol device max max max units tbuf driving a horizontal longline (l.l.) t io1 xc4003 8.8 6.2 4.4 ns i going high or low to l.l. going high or low, xc4005 10.0 7.0 5.5 ns while t is low, i.e. buffer is constantly active xc4006 10.6 7.5 6.0 ns xc4008 11.1 8.0 6.5 ns xc4010 11.7 8.5 7.0 ns xc4013 13.0 9.5 7.5 ns xc4025 20.0 16.5 14.5 ns i going low to l.l. going from resistive pull-up t io2 xc4003 9.3 6.7 5.0 ns high to active low, (tbuf configured as open drain) xc4005 10.5 7.5 6.0 ns xc4006 11.1 8.0 6.5 ns xc4008 11.6 8.5 7.0 ns xc4010 12.2 9.0 7.5 ns xc4013 13.5 10.0 8.0 ns xc4025 23.5 20.0 18.0 ns t going low to l.l. going from resistive pull-up or t on xc4003 10.7 9.0 7.2 ns floating high to active low, (tbuf configured as xc4005 12.0 10.0 8.0 ns open drain or active buffer with i = low) xc4006 12.6 10.5 8.5 ns xc4008 13.2 11.0 9.0 ns xc4010 13.8 11.5 9.5 ns xc4013 15.1 12.6 11.1 ns xc4025 23.0 20.5 19.0 ns t going high to tbuf going inactive, not driving l.l. t off all devices 3.0 2.0 1.8 ns t going high to l.l. going from low to high, t pus xc4003 24.0 20.0 14.0 ns pulled up by a single resistor xc4005 26.0 22.0 16.0 ns xc4006 28.0 24.0 18.0 ns xc4008 30.0 26.0 20.0 ns xc4010 32.0 28.0 22.0 ns xc4013 36.0 32.0 26.0 ns xc4025 52.0 48.0 42.0 ns t going high to l.l. going from low to high, t puf xc4003 11.6 9.0 7.0 ns pulled up by two resistors xc4005 12.0 10.0 8.0 ns xc4006 13.0 11.0 9.0 ns xc4008 14.0 12.0 10.0 ns xc4010 15.0 13.0 11.0 ns xc4013 17.0 15.0 13.0 ns xc4025 24.0 22.0 20.0 ns global buffer switching characteristic guidelines testing of the switching parameters is modeled after testing methods specified by mil-m-38510/605. all devices are 100% functionally tested. since many internal timing parameters cannot be measured directly, they are derived from benchmark timing patterns. the following guidelines reflect worst-case values over the recommended operating conditions. for more detailed, more precise, and more up-to-date timing information, use the values provided by the xact timing calculator and used in the simulator. horizontal longline switching characteristic guidelines testing of the switching parameters is modeled after testing methods specified by mil-m-38510/605. all devices are 100% functionally tested. since many internal timing parameters cannot be measured directly, they are derived from benchmark timing patterns. the following guidelines reflect worst-case values over the recommended operating conditions. for more detailed, more precise, and more up-to-date timing information, use the values provided by the xact timing calculator and used in the simulator. preliminary
2-51 pad to i1, i2 via transparent latch, with delay xc4003 17.6 ns xc4005 17.9 ns xc4006 18.0 ns xc4008 18.3 ns xc4010 18.6 ns xc4013 19.3 ns xc4025 23.5 ns t pdli for -4 speed grade input set-up time pad to clock (ik) with delay xc4003 15.6 ns xc4005 15.9 ns xc4006 16.0 ns xc4008 16.3 ns xc4010 16.6 ns xc4013 17.3 ns xc4025 22.5 ns t pickd for -4 speed grade x6082 speed grade -6 -5 -4 description symbol device units global clock to output (fast) using off t ickof xc4003 15.1 12.5 11.6 ns xc4005 15.5 13.0 12.0 ns xc4006 15.7 13.2 12.2 ns (max) xc4008 16.1 13.6 12.6 ns xc4010 16.5 14.0 13.0 ns xc4013 17.5 15.0 14.0 ns xc4025 25.5 22.0 21.0 ns global clock to output (slew limited) using off t icko xc4003 19.9 15.2 14.4 ns xc4005 20.5 16.0 15.0 ns xc4006 20.7 16.2 15.2 ns (max) xc4008 21.1 16.6 15.6 ns xc4010 21.5 17.0 16.0 ns xc4013 22.5 18.0 17.0 ns xc4025 29.5 25.0 24.0 ns input set-up time, using iff (no delay) t psuf xc4003 2.4 2.0 1.6 ns xc4005 2.0 1.5 1.2 ns xc4006 1.8 1.3 1.0 ns (min) xc4008 1.4 0.9 0.6 ns xc4010 1.0 0.5 0.2 ns xc4013 0.5 0 0 ns xc4025 0 0 0 ns input hold time, using iff (no delay) t phf xc4003 5.1 4.0 4.0 ns xc4005 5.5 4.5 4.5 ns xc4006 5.7 4.7 4.7 ns (min) xc4008 6.1 5.1 5.1 ns xc4010 6.5 5.5 5.5 ns xc4013 7.5 6.5 6.5 ns xc4025 18.0 16.0 15.5 ns input set-up time, using iff (with delay) t psu xc4003 21.5 18.5 12.0 ns xc4005 21.0 18.0 12.0 ns xc4006 20.8 17.8 12.0 ns (min) xc4008 20.4 17.4 12.0 ns xc4010 20.0 17.0 12.0 ns xc4013 19.0 16.0 12.0 ns xc4025 18.0 15.0 12.0 ns input hold time, using iff (with delay) t ph xc4003 0 0 0 ns xc4005 0 0 0 ns xc4006 0 0 0 ns (min) xc4008 0 0 0 ns xc4010 0 0 0 ns xc4013 0 0 0 ns xc4025 0 0 0 ns guaranteed input and output parameters (pin-to-pin) all values listed below are tested directly, and guaranteed over the operating conditions. the same parameters can also be derived indirectly from the iob and global buffer specifications. the xact delay calculator uses this indirect method. when there is a discrepancy between these two methods, the values listed below should be used, and the derived values must be ignored. off global clock-to-output delay . . . . . x3202 t pg off global clock-to-output delay . . . . . x3202 t pg iff input set-up & hold time x3201 d t pg iff input set-up & hold time x3201 d t pg iff input set-up & hold time x3201 d t pg iff input set-up & hold time x3201 d t pg timing is measured at pin threshold, with 50 pf external capacitive loads (incl. test fixture). when testing fast outputs, only one output switches. when testing slew-rate limited outputs, half the number of outputs on one side of the device are switching. these parameter values are tested and guaranteed for worst-case conditions of supply voltage and temperature, and also with the most unfavorable clock polarity choice. preliminary see page 2-52
2-52 XC4000 logic cell array family speed grade -6 -5 -4 description symbol min max min max min max units input propagation delays pad to i1, i2 t pid 4.0 3.0 2.8 ns pad to i1, i2, via transparent latch (no delay) t pli 8.0 7.0 6.0 ns pad to i1, i2, via transparent latch (with delay) t pdli 26.0 24.0 ** ns clock (ik) toi1, i2, (flip-flop) t ikri 8.0 7.0 6.0 ns clock (ik) to i1, i2 (latch enable, active low) t ikli 8.0 7.0 6.0 ns set-up time (note 3) pad to clock (ik), no delay t pick 7.0 6.0 4.0 ns pad to clock (ik) with delay t pickd 25.0 24.0 ** ns hold time (note 3) pad to clock (ik), no delay t ikpi 1.0 1.0 1.0 ns pad to clock (ik) with delay t ikpid neg neg neg ns output propagation delays clock (ok) to pad (fast) t okpof 7.5 7.0 6.5 ns same (slew rate limited) t okpos 11.5 10.0 9.5 ns output (o) to pad (fast) t opf 9.0 7.0 5.5 ns same (slew-rate limited) t ops 13.0 10.0 8.5 ns 3-state to pad begin hi-z (slew-rate independent) t tshz 9.0 7.0 6.5 ns 3-state to pad active and valid (fast) t tsonf 13.0 10.0 9.5 ns same (slew -rate limited) t tsons 17.0 13.0 12.5 ns set-up and hold times output (o) to clock (ok) set-up time t ook 8.0 6.0 5.5 ns output (o) to clock (ok) hold time t oko 000ns clock clock high or low time t ch/ t cl 5.0 4.5 4.0 ns global set/reset delay from gsr net through q to i1, i2 t rri 14.5 13.5 13.5 ns delay from gsr net to pad t rpo 18.0 17.0 14.0 ns gsr width * t mrw 21.0 18.0 18.0 ns iob switching characteristic guidelines testing of the switching parameters is modeled after testing methods specified by mil-m-38510/605. all devices are 100% functionally tested. since many internal timing parameters cannot be measured directly, they are derived from benchmark timing patterns. the following guidelines reflect worst-case values over the recommended operating conditions. for more detailed, more precise, and more up-to-date timing information, use the values provided by the xact timing calculator and used in the simulator. * timing is based on the xc4005. for other devices see xact timing calculator. ** see preceding page notes: 1. timing is measured at pin threshold, with 50 pf external capacitive loads (incl. test fixture). slew rate limited output rise/fall times are approximately two times longer than fast output rise/fall times. for the effect of capacitive loads on ground bounce, see pages 8-8 through 8-10. 2. voltage levels of unused (bonded and unbonded) pads must be valid logic levels. each can be configured with the internal pull-up or pull-down resistor or alternatively configured as a driven output or be driven from an external source. 3. input pad setup times and hold times are specified with respect to the internal clock (ik). to calculate system setup time, subtract clock delay (clock pad to ik) from the specified input pad setup time value, but do not subtract below zero. negative hold time means that the delay in the input data is adequate for the external system hold time to be zero, provided the input clock uses the global signal distribution from pad to ik.
2-53 speed grade -6 -5 -4 description symbol min max min max min max units combinatorial delays f/g inputs to x/y outputs t ilo 6.0 4.5 4.0 ns f/g inputs via h to x/y outputs t iho 8.0 7.0 6.0 ns c inputs via h to x/y outputs t hho 7.0 5.0 4.5 ns clb fast carry logic operand inputs (f1,f2,g1,g4) to c out t opcy 7.0 5.5 5.0 ns add/subtract input (f3) to c out t ascy 8.0 6.0 5.5 ns initialization inputs (f1,f3) to c out t incy 6.0 4.0 3.5 ns c in through function generators to x/y outputs t sum 8.0 6.0 5.5 ns c in to c out , bypass function generators. t byp 2.0 1.5 1.5 ns sequential delays clock k to outputs q t cko 5.0 3.0 3.0 ns set-up time before clock k f/g inputs t ick 6.0 4.5 4.5 ns f/g inputs via h t ihck 8.0 6.0 6.0 ns c inputs via h1 t hhck 7.0 5.0 5.0 ns c inputs via din t dick 4.0 3.0 3.0 ns c inputs via ec t ecck 7.0 4.0 3.0 ns c inputs via s/r, going low (inactive) t rck 6.0 4.5 4.0 ns c in input via f'/g' t cck 8.0 6.0 5.5 ns c in input via f'/g' and h' t chck 10.0 7.5 7.3 ns hold time after clock k f/g inputs t cki 000ns f/g inputs via h t ckih 000ns c inputs via h1 t ckhh 000ns c inputs via din t ckdi 000ns c inputs via ec t ckec 000ns c inputs via s/r, going low (inactive) t ckr 000ns clock clock high time t ch 5.0 4.5 4.0 ns clock low time t cl 5.0 4.5 4.0 ns set/reset direct width (high) t rpw 5.0 4.0 4.0 ns delay from c inputs via s/r, going high to q t rio 9.0 8.0 7.0 ns master set/reset* width (high or low) t mrw 21.0 18.0 18.0 ns delay from global set/reset net to q t mrq 33.0 31.0 28.0 ns clb switching characteristic guidelines testing of the switching parameters is modeled after testing methods specified by mil-m-38510/605. all devices are 100% functionally tested. since many internal timing parameters cannot be measured directly, they are derived from benchmark timing patterns. the following guidelines reflect worst-case values over the recommended operating conditions. for more detailed, more precise, and more up-to-date timing information, use the values provided by the xact timing calculator and used in the simulator. * timing is based on the xc4005. for other devices see xact timing calculator.
2-54 XC4000 logic cell array family write operation address write cycle time 16 x 2 t wc 9.0 8.0 8.0 ns 32 x 1 t wct 9.0 8.0 8.0 ns write enable pulse width (high) 16 x 2 t wp 5.0 4.0 4.0 ns 32 x 1 t wpt 5.0 4.0 4.0 ns address set-up time before beginning of we 16 x 2 t as 2.0 2.0 2.0 ns 32 x 1 t ast 2.0 2.0 2.0 ns address hold time after end of we 16 x 2 t ah 2.0 2.0 2.0 ns 32 x 1 t aht 2.0 2.0 2.0 ns din set-up time before end of we 16 x 2 t ds 4.0 4.0 4.0 ns 32 x 1 t dst 5.0 5.0 5.0 ns din hold time after end of we both t dht 2.0 2.0 2.0 ns read operation address read cycle time 16 x 2 t rc 7.0 5.5 5.0 ns 32 x 1 t rct 10.0 7.5 7.0 ns data valid after address change 16 x 2 t ilo 6.0 4.5 4.0 ns (no write enable) 32 x 1 t iho 8.0 7.0 6.0 ns read operation, clocking data into flip-flop address setup time before clock k 16 x 2 t ick 6.0 4.5 4.5 ns 32 x 1 t ihck 8.0 6.0 6.0 ns read during write data valid after we going active 16 x 2 t wo 12.0 10.0 9.0 ns (din stable before we) 32 x 1 t wot 15.0 12.0 11.0 ns data valid after din 16 x 2 t do 11.0 9.0 8.5 ns (din change during we) 32 x 1 t dot 14.0 11.0 11.0 ns read during write, clocking data into flip-flop we setup time before clock k 16 x 2 t wck 12.0 10.0 9.5 ns 32 x 1 t wckt 15.0 12.0 11.5 ns data setup time before clock k 16 x 2 t dck 11.0 9.0 9.0 ns 32 x 1 t dckt 14.0 11.0 11.0 ns clb switching characteristic guidelines (continued) testing of the switching parameters is modeled after testing methods specified by mil-m-38510/605. all devices are 100% functionally tested. since many internal timing parameters cannot be measured directly, they are derived from benchmark timing patterns. the following guidelines reflect worst-case values over the recommended operating conditions. for more detailed, more precise, and more up-to-date timing information, use the values provided by the xact timing calculator and used in the simulator. clb ram option speed grade -6 -5 -4 description symbol min max min max min max units note: timing for the 16 x 1 ram option is identical to 16 x 2 ram timing
2-55 wc t ilo t valid valid address x,y outputs read clock xq,yq outputs read during write ick t cko t wp t valid valid wo t write enable data in (stable during we) x,y outputs data in (changing during we) x,y outputs old new wo t valid (old) do t valid (new) write enable data in clock xq,yq outputs write enable data in read during write, clocking data into flip-flop write wp t wck t dck t cko t as t wp t ds t dh t x2640 required dh t valid (previous) ch t valid (new) valid (old) ah t read, clocking data into flip-flop clb ram timing characteristics
XC4000 logic cell array family 2-56 xc4003 pinouts * indicates unconnected package pins. ? contributes only one bit (.i) to the boundary scan register. boundary scan bit 0 = tdo.t boundary scan bit 1 = tdo.o boundary scan bit 247 = bscant.upd pin description bound scan pin description bound scan pc84 pq100 pg120 pc84 pq100 pg120 vcc 292g3e gnd 43 41 g11 e i/o (a8) 3 93 g1 32 i/o 44 42 g13 157 i/o (a9) 4 94 f1 35 i/o 45 43 h13 160 i/o e 95 e1 38 i/o e 44 j13 163 i/o e 96 f2 41 i/o e 45 h12 166 i/o (a10) 5 97 f3 44 i/o 46 46 h11 169 i/o (a11) 6 98 d1 47 i/o 47 47 k13 172 eeee2 * e i/o 48 48 j12 175 i/o (a12) 7 99 c1 50 i/o 49 49 l13 178 i/o (a13) 8 100 d2 53 e e e k12 * e eeee3 * e e e e j11 * e eeeb1 * e i/o 50 50 m13 181 i/o (a14) 9 1 c2 56 sgck3 (i/o) 51 51 l12 184 sgck1 (a15,i/o) 10 2 d3 59 gnd 52 52 k11 e vcc 11 3 c3 e done 53 53 l11 e gnd 124c4e vcc 54 54 l10 e pgck1 (a16, i/o) 13 5 b2 62 prog 55 55 m12 e i/o (a17) 14 6 b3 65 i/o (d7) 56 56 m11 187 eeea1 * e pgck3 (i/o) 57 57 n13 190 eeea2 * e e e e n12 * e i/o (tdi) 15 7 c5 68 e e e l9 * e i/o (tck) 16 8 b4 71 i/o (d6) 58 58 m10 193 eeea3 * e i/o e 59 n11 196 i/o (tms) 17 9 b5 74 i/o (d5) 59 60 m9 199 i/o 18 10 a4 77 i/o (cs0 ) 60 61 n10 202 i/o e e c6 80 i/o e 62 l8 205 i/o e 11 a5 83 i/o e 63 n9 208 i/o 19 12 b6 86 i/o (d4) 61 64 m8 211 i/o 20 13 a6 89 i/o 62 65 n8 214 gnd 21 14 b7 e vcc 63 66 m7 e vcc 22 15 c7 e gnd 64 67 l7 e i/o 23 16 a7 92 i/o (d3) 65 68 n7 217 i/o 24 17 a8 95 i/o ( rs ) 66 69 n6 220 i/o e 18 a9 98 i/o e 70 n5 223 i/o e e b8 101 i/o e e m6 226 i/o 25 19 c8 104 i/o (d2) 67 71 l6 229 i/o 26 20 a10 107 i/o 68 72 n4 232 i/o 27 21 b9 110 i/o (d1) 69 73 m5 235 i/o e 22 a11 113 i/o (rclk-busy /rdy) 70 74 n3 238 e e e b10 * eeeem4 * e i/o 28 23 c9 116 e e e l5 * e sgck2 (i/o) 29 24 a12 119 i/o (d0, din) 71 75 n2 241 o (m1) 30 25 b11 122 sgck4 (dout, i/o) 72 76 m3 244 gnd 31 26 c10 e cclk 73 77 l4 e i (m0) 32 27 c11 125 ? vcc 74 78 l3 e vcc 33 28 d11 e o (tdo) 75 79 m2 e i (m2) 34 29 b12 126 ? gnd 76 80 k3 e pgck2 (i/o) 35 30 c12 127 i/o (a0, ws ) 7781l2 2 i/o (hdc) 36 31 a13 130 pgck4 (a1, i/o) 78 82 n1 5 e e e b13 * eeeem1 * e e e e e11 * eeeej3 * e i/o e 32 d12 133 i/o (cs1, a2) 79 83 k2 8 i/o ( ldc ) 37 33 c13 136 i/o (a3) 80 84 l1 11 i/o 38 34 e12 139 i/o (a4) 81 85 j2 14 i/o 39 35 d13 142 i/o (a5) 82 86 k1 17 i/o e 36 f11 145 i/o e 87 h3 20 i/o e 37 e13 148 i/o e 88 j1 23 i/o 40 38 f12 151 i/o (a6) 83 89 h2 26 i/o ( err , init ) 41 39 f13 154 i/o (a7) 84 90 h1 29 vcc 42 40 g12 e gnd 191g2e this document was created with framemake r402
2-57 xc4005 pinouts * indicates unconnected package pins. boundary scan bit 0 = tdo.t ? contributes only one bit (.i) to the boundary scan register. boundary scan bit 1 = tdo.o boundary scan bit 343 = bscant.upd pin description bound scan pin description bound scan pin description bound scan pc84 pq160 pq208 pg156 pc84 pq160 pq208 pg156 pc84 pq160 pq208 pg156 vcc 2 142 183 h3 e i/o e 35 45 c12 161 i/o e 88 114 t13 274 i/o (a8) 3 143 184 h1 44 e eeeee e e89 * 115 * r12 * e i/o (a9) 4 144 185 g1 47 i/o 28 36 46 b13 164 e e 89 * 115 * r12 * e i/o e 145 186 g2 50 sgck2 (i/o) 29 37 47 b14 167 e e 90 1 116 * t12 * e i/o e 146 187 g3 53 o (m1) 30 38 48 a15 170 e e e 117 * ee e e e 188 * ee gnd 31 39 49 c13 e e e e 118 * ee e e e 189 * e e i (m0) 32 40 50 a16 173? gnd e 91 119 p11 e i/o (a10) 5 147 190 f1 56 e e e 51 * e e i/o e 92 120 r11 277 i/o (a11) 6 148 191 f2 59 e e e 52 * e e i/o e 93 121 t11 280 i/o e 149 192 e1 62 e e e 53 * e e i/o (d5) 59 94 122 t10 283 i/o e 150 193 e2 65 e e e 54 * e e i/o (cs0) 60 95 123 p10 286 gnd e 151 194 f3 e vcc 33 41 55 c14 e e e e 124 * ee e e e 195 * e e i (m2) 34 42 56 b15 174? e e e 125 * ee e e e 196 * e e pgck2 (i/o) 35 43 57 b16 175 i/o e 96 126 r10 289 e e 152 * 197 * d1 * e i/o (hdc) 36 44 58 d14 178 i/o e 97 127 t9 292 e e 153 * 198 * d2 * e i/o e 45 59 c15 181 i/o (d4) 61 98 128 r9 295 i/o (a12) 7 154 199 e3 68 e eeeee i/o 6299129p9298 i/o (a13) 8 155 200 c1 71 i/o e 46 60 d15 184 vcc 63 100 130 r8 e e eeeee i/o e4761e14187 gnd 64 101 131 p8 e i/o e 156 201 c2 74 i/o (ldc ) 37 48 62 c16 190 i/o (d3) 65 102 132 t8 301 i/o e 157 202 d3 77 e e 49 * 63 * e15 * e i/o (rs ) 66 103 133 t7 304 i/o (a14) 9 158 203 b1 80 e e 50 * 64 * d16 * e i/o e 104 134 t6 307 sgck1 (a15, i/o) 10 159 204 b2 83 e e e 65 * e e i/o e 105 135 r7 310 vcc 11 160 205 c3 e e e e 66 * e e e e e 136 * ee e e e 206 * ee gnd e 51 67 f14 e e e e 137 * ee e e e 207 * e e i/o e 52 68 f15 193 i/o (d2) 67 106 138 p7 313 e e e 208 * e e i/o e 53 69 e16 196 i/o 68 107 139 t5 316 eee1 * e e i/o 38 54 70 f16 199 i/o e 108 140 r6 319 gnd 12 1 2 c4 e i/o 39 55 71 g14 202 i/o e 109 141 t4 322 eee3 * ee e ee72 * ee gnd e 110 142 p6 e pgck1 (a16, i/o) 13 2 4 b3 86 e e e 73 * e e e e e 143 * ee i/o (a17) 14 3 5 a1 89 i/o e 56 74 g15 205 e e e 144 * ee i/o e 4 6 a2 92 i/o e 57 75 g16 208 e e 111 * 145 * r5 * e i/o e 5 7 c5 95 i/o 40 58 76 h16 211 e e 112 * 146 * ee e eeeee i/o (err , init ) 41 59 77 h15 214 i/o (d1) 69 113 147 t3 325 i/o (tdi) 15 6 8 b4 98 vcc 42 60 78 h14 e i/o (rclk-busy/rdy) 70 114 148 p5 328 i/o (tck) 16 7 9 a3 101 gnd 43 61 79 j14 e i/o e 115 149 r4 331 ee8 * 10 * a4 * e i/o 446280j15217 e eeeee ee9 * 11 * e e i/o 45 63 81 j16 220 i/o e 116 150 r3 334 eee12 * e e i/o e 64 82 k16 223 i/o (d0, din) 71 117 151 p4 337 eee13 * e e i/o e 65 83 k15 226 sgck4 (dout, i/o) 72 118 152 t2 340 gnd e1014c6e e e e84 * e e cclk 73 119 153 r2 e i/o e 11 15 b5 104 e e e 85 * ee vcc 74 120 154 p3 e i/o e 12 16 b6 107 i/o 46 66 86 k14 229 e e e 155 * ee i/o (tms) 17 13 17 a5 110 i/o 47 67 87 l16 232 e e e 156 * ee i/o 18 14 18 c7 113 i/o e 68 88 m16 235 e e e 157 * ee eee19 * e e i/o e 69 89 l15 238 e e e 158 * ee eee20 * ee gnd e 70 90 l14 e o (tdo) 75 121 159 t1 e i/o e 15 21 b7 116 e e e 91 * ee gnd 76 122 160 n3 e i/o e 16 22 a6 119 e e e 92 * e e i/o (a0,ws ) 77 123 161 r1 2 i/o 19 17 23 a7 122 e e 71 * 93 * n16 * e pgck4 (a1,i/o) 78 124 162 p2 5 i/o 20 18 24 a8 125 e e 72 * 94 * m15 * e i/o e 125 163 n2 8 gnd 211925c8e i/o 487395p16241 e eeeee vcc 22 20 26 b8 e i/o 49 74 96 m14 244 i/o e 126 164 m3 11 i/o 23 21 27 c9 128 i/o e 75 97 n15 247 i/o (cs1,a2) 79 127 165 p1 14 i/o 24 22 28 b9 131 i/o e 76 98 p15 250 i/o (a3) 80 128 166 n1 17 i/o e 23 29 a9 134 i/o 50 77 99 n14 253 e e 129 * 167 * m2 * e i/o e 24 30 b10 137 sgck3 (i/o) 51 78 100 r16 256 e e 130 * 168 * m1 * e eee31 * ee gnd 52 79 101 p14 e e e e 169 * ee eee32 * e e e e e 102 * e e e e e 170 * ee i/o 25 25 33 c10 140 done 53 80 103 r15 e gnd e 131 171 l3 e i/o 26 26 34 a10 143 e e e 104 * e e i/o e 132 172 l2 20 i/o e 27 35 a11 146 e e e 105 * e e i/o e 133 173 l1 23 i/o e 28 36 b11 149 vcc 54 81 106 p13 e i/o (a4) 81 134 174 k3 26 gnd e 29 37 c11 e e e e 107 * e e i/o (a5) 82 135 175 k2 29 eee38 * e e prog 55 82 108 r14 e e e e 176 * ee eee39 * e e i/o (d7) 56 83 109 t16 259 e e 136 * 177 * ee ee30 * 40 * a12 * e pgck3 (i/o) 57 84 110 t15 262 i/o e 137 178 k1 32 ee31 * 41 * e e i/o e 85 111 r13 265 i/o e 138 179 j1 35 i/o 273242b12152 e eeeee i/o (a6) 83 139 180 j2 38 i/o e 33 43 a13 155 i/o e 86 112 p12 268 i/o (a7) 84 140 181 j3 41 i/o e 34 44 a14 158 i/o (d6) 58 87 113 t14 271 gnd 1 141 182 h2 e this document was created with framemake r402
2-58 XC4000 logic cell array family pin boundary pin boundary description pc84 pg156 pq160 pq208 scan order description pc84 pg156 pq160 pq208 scan order vcc 2 h3 142 183 - i/o 23 c9 21 27 146 i/o (a8) 3 h1 143 184 50 i/o 24 b9 22 28 149 i/o (a9) 4 g1 144 185 53 i/o - a9 23 29 152 i/o - g2 145 186 56 i/o - b10 24 30 155 i/o - g3 146 187 59 - - - - 31* - - - - - 188* - - - - - 32* - - - - - 189* - i/o 25 c10 25 33 158 i/o (a10) 5 f1 147 190 62 i/o 26 a10 26 34 161 i/o (a11) 6 f2 148 191 65 i/o - a11 27 35 164 i/o - e1 149 192 68 i/o - b11 28 36 167 i/o - e2 150 193 71 gnd - c11 29 37 - gnd - f3 151 194 - - - - - 38* - - - - - 195* - - - - - 39* - - - - - 196* - i/o - a12 30 40 170 i/o - d1 152 197 74 i/o - - 31 41 173 i/o - d2 153 198 77 i/o 27 b12 32 42 176 i/o (a12) 7 e3 154 199 80 i/o - a13 33 43 179 i/o (a13) 8 c1 155 200 83 i/o - a14 34 44 182 i/o - c2 156 201 86 i/o - c12 35 45 185 i/o - d3 157 202 89 i/o 28 b13 36 46 188 i/o (a14) 9 b1 158 203 92 sgck2 (i/o) 29 b14 37 47 191 sgck1 (a15, i/o) 10 b2 159 204 95 m1 30 a15 38 48 194 vcc 11 c3 160 205 - gnd 31 c13 39 49 - - - - - 206* - m0 32 a16 40 50 197? - - - - 207* - - - - - 51* - - - - - 208* - - - - - 52* - - ---1* - - ---53* - gnd 12c412 - - ---54* - - ---3* - vcc 33 c14 41 55 - pgck1 (a16, i/o) 13 b3 2 4 98 m2 34 b15 42 56 198? i/o (a17) 14 a1 3 5 101 pgck2 (i/o) 35 b16 43 57 199 i/o - a2 4 6 104 i/o (hdc) 36 d14 44 58 202 i/o - c5 5 7 107 i/o - c15 45 59 205 i/o (tdi) 15 b4 6 8 110 i/o - d15 46 60 208 i/o (tck) 16 a3 7 9 113 i/o - e14 47 61 211 i/o - a4 8 10 116 i/o (ldc) 37 c16 48 62 214 i/o - - 9 11 119 i/o - e15 49 63 217 - - - - 12* - i/o - d16 50 64 220 - ---13* - - ---65* - gnd -c61014 - - ---66* - i/o - b5 11 15 122 gnd - f14 51 67 - i/o - b6 12 16 125 i/o - f15 52 68 223 i/o (tms) 17 a5 13 17 128 i/o - e16 53 69 226 i/o 18 c7 14 18 131 i/o 38 f16 54 70 229 - - - - 19* - i/o 39 g14 55 71 232 - ---20* - - ---72* - i/o - b7 15 21 134 - - - - 73* - i/o - a6 16 22 137 i/o - g15 56 74 235 i/o 19 a7 17 23 140 i/o - g16 57 75 238 i/o 20 a8 18 24 143 i/o 40 h16 58 76 241 gnd 21 c8 19 25 - i/o (err,init) 41 h15 59 77 244 vcc 22 b8 20 26 - vcc 42 h14 60 78 - xc4006 pinouts * indicates unconnected package pins. ? contributes only one bit (.i) to the boundary scan register. o (m1) i (m0) i (m2) pc 84 pq 160 pq 208 pg 156 pc 84 pg 156 pq 160 pq 208
2-59 pin boundary pin boundary description pc84 pg156 pq160 pq208 scan order description pc84 pg156 pq160 pq208 scan order gnd 43 j14 61 79 - gnd 64 p8 101 131 - i/o 44 j15 62 80 247 i/o (d3) 65 t8 102 132 343 i/o 45 j16 63 81 250 i/o (rs) 66 t7 103 133 346 i/o - k16 64 82 253 i/o - t6 104 134 349 i/o - k15 65 83 256 i/o - r7 105 135 352 - - - - 84* - - - - - 136* - - - - - 85* - - - - - 137* - i/o 46 k14 66 86 259 i/o (d2) 67 p7 106 138 355 i/o 47 l16 67 87 262 i/o 68 t5 107 139 358 i/o - m16 68 88 265 i/o - r6 108 140 361 i/o - l15 69 89 268 i/o - t4 109 141 364 gnd - l14 70 90 - gnd - p6 110 142 - - - - - 91* - - - - - 143* - - - - - 92* - - - - - 144* - i/o - n16 71 93 271 i/o - r5 111 145 367 i/o - m15 72 94 274 i/o - - 112 146 370 i/o 48 p16 73 95 277 i/o (d1) 69 t3 113 147 373 i/o 49 m14 74 96 280 i/o (rclk-busy/rdy) 70 p5 114 148 376 i/o - n15 75 97 283 i/o - r4 115 149 379 i/o - p15 76 98 286 i/o - r3 116 150 382 i/o 50 n14 77 99 289 i/o (d0, din) 71 p4 117 151 385 sgck3 (i/o) 51 r16 78 100 292 sgck4 (dout, i/o) 72 t2 118 152 388 gnd 52 p14 79 101 - cclk 73 r2 119 153 - - - - - 102* - vcc 74 p3 120 154 - done 53 r15 80 103 - - - - - 155* - - - - - 104* - - - - - 156* - - - - - 105* - - - - - 157* - vcc 54 p13 81 106 - - - - - 158* - - - - - 107* - tdo 75 t1 121 159 - prog 55 r14 82 108 - gnd 76 n3 122 160 - i/o (d7) 56 t16 83 109 295 i/o (a0, ws) 77 r1 123 161 2 pgck3 (i/o) 57 t15 84 110 298 pgck4 (i/o, a1) 78 p2 124 162 5 i/o - r13 85 111 301 i/o - n2 125 163 8 i/o - p12 86 112 304 i/o - m3 126 164 11 i/o (d6) 58 t14 87 113 307 i/o (cs1,a2) 79 p1 127 165 14 i/o - t13 88 114 310 i/o (a3) 80 n1 128 166 17 i/o - r12 89 115 313 i/o - m2 129 167 20 i/o - t12 90 116 316 i/o - m1 130 168 23 - - - - 117* - - - - - 169* - - - - - 118* - - - - - 170* - gnd - p11 91 119 - gnd - l3 131 171 - i/o - r11 92 120 319 i/o - l2 132 172 26 i/o - t11 93 121 322 i/o - l1 133 173 29 i/o (d5) 59 t10 94 122 325 i/o (a4) 81 k3 134 174 32 i/o (cs0) 60 p10 95 123 328 i/o (a5) 82 k2 135 175 35 - - - - 124* - - - - - 176* - - - - - 125* - - - - 136* 177* - i/o - r10 96 126 331 i/o - k1 137 178 38 i/o - t9 97 127 334 i/o - j1 138 179 41 i/o (d4) 61 r9 98 128 337 i/o (a6) 83 j2 139 180 44 i/o 62 p9 99 129 340 i/o (a7) 84 j3 140 181 47 vcc 63 r8 100 130 - gnd 1 h2 141 182 - * indicates unconnected package pins. boundary scan bit 0 = tdo.t boundary scan bit 1 = tdo.o boundary scan bit 391 = bscan.upd pc 84 pg 156 pq1 60 pq 208 pc 84 xc4006 pinouts (continued) pg 156 pq 160 pq 208
2-60 XC4000 logic cell array family pin boundary pin boundary description pc84 pq160 pg191 pq208 scan order description pc84 pc160 pg191 pq208 scan order vcc 2 142 j4 183 vcc 22 20 d10 26 i/o (a8) 3 143 j3 184 56 i/o 23 21 c10 27 164 i/o (a9) 4 144 j2 185 59 i/o 24 22 b10 28 167 i/o 145 j1 186 62 i/o 23 a9 29 170 i/o 146 h1 187 65 i/o 24 a10 30 173 i/o h2 188 68 i/o a11 31 176 i/o h3 189 71 i/o c11 32 179 i/o (a10) 5 147 g1 190 74 i/o 25 25 b11 33 182 i/o (a11) 6 148 g2 191 77 i/o 26 26 a12 34 185 i/o 149 f1 192 80 i/o 27 b12 35 188 i/o 150 e1 193 83 i/o 28 a13 36 191 gnd 151 g3 194 gnd 29 c12 37 f2* 195* b13* 38* d1* 196* a14* 39* i/o 152 c1 197 86 i/o 30 a15 40 194 i/o 153 e2 198 89 i/o 31 c13 41 197 i/o (a12) 7 154 f3 199 92 i/o 27 32 b14 42 200 i/o (a13) 8 155 d2 200 95 i/o 33 a16 43 203 i/o 156 b1 201 98 i/o 34 b15 44 206 i/o 35c1445 209 i/o 157 e3 202 101 i/o 28 36 a17 46 212 i/o (a14) 9 158 c2 203 104 sgck2 (i/o) 29 37 b16 47 215 sgck1 (a15, i/o) 10 159 b2 204 107 m1 30 38 c15 48 218 vcc 11 160 d3 205 gnd 31 39 d15 49 206* m0 32 40 a18 50 221? 207* 51* 208* 52* 1* 53* gnd 12 1d42 54* 3* vcc 33 41 d16 55 pgck1 (a16, i/o) 13 2 c3 4 110 m2 34 42 c16 56 222? i/o (a17) 14 3 c4 5 113 pgck2 (i/o) 35 43 b17 57 223 i/o 4 b3 6 116 i/o (hdc) 36 44 e16 58 226 i/o 5 c5 7 119 i/o 45 c17 59 229 i/o (tdi) 15 6 a2 8 122 i/o 46 d17 60 232 i/o (tck) 16 7 b4 9 125 i/o 47 b18 61 235 i/o 8 c6 10 128 i/o (ldc) 37 48 e17 62 238 i/o 9 a3 11 131 i/o 49 f16 63 241 b5* 12* i/o 50 c18 64 244 b6* 13* d18* 65* gnd 10 c7 14 f17* 66* i/o 11 a4 15 134 gnd 51 g16 67 i/o 12 a5 16 137 i/o 52 e18 68 247 i/o (tms) 17 13 b7 17 140 i/o 53 f18 69 250 i/o 18 14 a6 18 143 i/o 38 54 g17 70 253 i/o c8 19 146 i/o 39 55 g18 71 256 i/o a7 20 149 i/o h16 72 259 i/o 15 b8 21 152 i/o h17 73 262 i/o 16 a8 22 155 i/o 56 h18 74 265 i/o 19 17 b9 23 158 i/o 57 j18 75 268 i/o 20 18 c9 24 161 i/o 40 58 j17 76 271 gnd 21 19 d9 25 i/o (err, init) 41 59 j16 77 274 vcc 42 60 j15 78 xc4008 pinouts * indicates unconnected package pins. ? contributes only one bit (.i) to the boundary scan register. o (m1) i (m0) i (m2) pc 84 pq 160 pg 191 pq 208 pc 84 pq 160 pg 191 pq 208
2-61 xc4008 pinouts (continued) * indicates unconnected package pins. boundary scan bit 0 = tdo.t boundary scan bit 1 = tdo.o boundary scan bit 439 = bscan.upd pin boundary pin boundary description pc84 pq160 pg191 pq208 scan order description pc84 pq160 pg191 pq208 scan order gnd 43 61 k15 79 i/o (d3) 65 102 t9 132 385 i/o 44 62 k16 80 277 i/o (rs) 66 103 u9 133 388 i/o 45 63 k17 81 280 i/o 104 v 9 134 391 i/o 64 k18 82 283 i/o 105 v 8 135 394 i/o 65 l18 83 286 i/o u8 136 397 i/o l17 84 289 i/o t8 137 400 i/o l16 85 292 i/o (d2) 67 106 v 7 138 403 i/o 46 66 m18 86 295 i/o 68 107 u7 139 406 i/o 47 67 m17 87 298 i/o 108 v 6 140 409 i/o 68 n18 88 301 i/o 109 u6 141 412 i/o 69 p18 89 304 gnd 110 t7 142 gnd 70 m16 90 v5* 143* n17* 91* v4* 144* r18* 92* i/o 111 u5 145 415 i/o 71 t18 93 307 i/o 112 t6 146 418 i/o 72 p17 94 310 i/o (d1) 69 113 v 3 147 421 i/o 48 73 n16 95 313 i/o (rclk-busy/rdy) 70 114 v2 148 424 i/o 49 74 t17 96 316 i/o 115 u4 149 427 i/o 75 r17 97 319 i/o 116 t5 150 430 i/o 76 p16 98 322 i/o (d0, din) 71 117 u3 151 433 i/o 50 77 u18 99 325 sgck4 (dout, i/o) 72 118 t4 152 436 sgck3 (i/o) 51 78 t16 100 328 cclk 73 119 v1 153 gnd 52 79 r16 101 vcc 74 120 r4 154 102* 155* done 53 80 u17 103 156* 104* 157* 105* 158* vcc 54 81 r15 106 td0 75 121 u2 159 107* gnd 76 122 r3 160 prog 55 82 v18 108 i/o (a0, ws) 77 123 t3 161 2 i/o (d7) 56 83 t15 109 331 pgck4 (i/o,a1) 78 124 u1 162 5 pgck3 (i/o) 57 84 u16 110 334 i/o 125p3163 8 i/o 85 t14 111 337 i/o 126 r2 164 11 i/o 86 u15 112 340 i/o (cs1, a2) 79 127 t2 165 14 i/o (d6) 58 87 v17 113 343 i/o (a3) 80 128 n3 166 17 i/o 88 v16 114 346 i/o 129 p2 167 20 i/o 89 t13 115 349 i/o 130 t1 168 23 i/o 90 u14 116 352 r1* 169* v15* 117* n2* 170* v14* 118* gnd 131 m3 171 gnd 91 t12 119 i/o 132 p1 172 26 i/o 92 u13 120 355 i/o 133 n1 173 29 i/o 93 v13 121 358 i/o (a4) 81 134 m2 174 32 i/o (d5) 59 94 u12 122 361 i/o (a5) 82 135 m1 175 35 i/o (cso) 60 95 v12 123 364 i/o l3 176 38 i/o t11 124 367 i/o 136 l2 177 41 i/o u11 125 370 i/o 137 l1 178 44 i/o 96 v11 126 373 i/o 138 k1 179 47 i/o 97 v10 127 376 i/o (a6) 83 139 k2 180 50 i/o (d4) 61 98 u10 128 379 i/o (a7) 84 140 k3 181 53 i/o 62 99 t10 129 382 gnd 1 141 k4 182 vcc 63 100 r10 130 gnd 64 101 r9 131 pc 84 pq 160 pg 191 pq 208 pq 160 pg 191 pq 208 pc 84
2-62 XC4000 logic cell array family pin *** boundary pin *** boundary description pc84 pq160 pg191 pq208 bg225 scan order description pc84 pq160 pg191 pq208 bg225 scan order vcc 2 142 j4 183 d8 - i/o - 24 a10 30 j1 191 i/o (a8) 3 143 j3 184 e8 62 i/o - - a11 31 j3 194 i/o (a9) 4 144 j2 185 b7 65 i/o - - c11 32 j4 197 i/o - 145 j1 186 a7 68 i/o 25 25 b11 33 k2 200 i/o - 146 h1 187 c7 71 i/o 26 26 a12 34 k3 203 i/o - - h2 188 d7 74 i/o - 27 b12 35 j6 206 i/o - - h3 189 e7 77 i/o - 28 a13 36 l1 209 i/o (a10) 5 147 g1 190 a6 80 gnd - 29 c12 37 ** - i/o (a11) 6 148 g2 191 b6 83 i/o - - b13 38 l3 212 i/o - 149 f1 192 a5 86 i/o - - a14 39 m1 215 i/o - 150 e1 193 b5 89 i/o - 30 a15 40 k5 218 gnd - 151 g3 194 ** - i/o - 31 c13 41 m2 221 i/o - - f2 195 d6 92 i/o 27 32 b14 42 l4 224 i/o - - d1 196 c5 96 i/o - 33 a16 43 n1 227 i/o - 152 c1 197 a4 98 i/o - 34 b15 44 m3 230 i/o - 153 e2 198 e6 101 i/o - 35 c14 45 n2 233 i/o (a12) 7 154 f3 199 b4 104 i/o 28 36 a17 46 k6 236 i/o (a13) 8 155 d2 200 d5 107 sgck2 (i/o) 29 37 b16 47 p1 239 i/o - 156 b1 201 b3 110 m1 30 38 c15 48 n3 242 i/o - 157 e3 202 f6 113 gnd 31 39 d15 49 ** - i/o (a14) 9 158 c2 203 a2 116 m0 32 40 a18 50 p2 245? sgck1 (a15, i/o) 10 159 b2 204 c3 119 - - - - 51* - - vcc 11 160 d3 205 b2 - - - - - 52* - - - - - - 206* - - - - - - 53* - - - - - - 207* - - - - - - 54* - - - - - - 208* - - vcc 33 41 d16 55 r1 - - - - - 1* - - m2 34 42 c16 56 m4 246? gnd 12 1 d4 2 a1 - pgck2 (i/o) 35 43 b17 57 r2 247 - - - - 3* - - i/o (hdc) 36 44 e16 58 p3 250 pgck1 (a16, i/o) 13 2 c3 4 d4 122 i/o - 45 c17 59 l5 253 i/o (a17) 14 3 c4 5 b1 125 i/o - 46 d17 60 n4 256 i/o - 4 b3 6 c2 128 i/o - 47 b18 61 r3 259 i/o - 5 c5 7 e5 131 i/o (ldc) 37 48 e17 62 p4 262 i/o (tdi) 15 6 a2 8 d3 134 i/o - 49 f16 63 k7 265 i/o (tck) 16 7 b4 9 c1 137 i/o - 50 c18 64 m5 268 i/o - 8 c6 10 d2 140 i/o - - d18 65 r4 271 i/o - 9 a3 11 g6 143 i/o - - f17 66 n5 274 i/o - - b5 12 e4 146 gnd - 51 g16 67 ** - i/o - - b6 13 d1 149 i/o - 52 e18 68 r5 277 gnd - 10 c7 14 ** - i/o - 53 f18 69 m6 280 i/o - 11 a4 15 f5 152 i/o 38 54 g17 70 n6 283 i/o - 12 a5 16 e1 155 i/o 39 55 g18 71 p6 286 i/o (tms) 17 13 b7 17 f4 158 i/o - - h16 72 r6 289 i/o 18 14 a6 18 f3 161 i/o - - h17 73 m7 291 i/o - - c8 19 g4 164 i/o - 56 h18 74 r7 295 i/o - - a7 20 g3 167 i/o - 57 j18 75 l7 298 i/o - 15 b8 21 g2 170 i/o 40 58 j17 76 n8 301 i/o - 16 a8 22 g1 173 i/o (err, init) 41 59 j16 77 p8 304 i/o 19 17 b9 23 g5 176 vcc 42 60 j15 78 r8 - i/o 20 18 c9 24 h3 179 gnd 43 61 k15 79 m8 - gnd 21 19 d9 25 h2 - i/o 44 62 k16 80 l8 307 vcc 22 20 d10 26 h1 - i/o 45 63 k17 81 p9 310 i/o 23 21 c10 27 h4 182 i/o - 64 k18 82 r9 313 i/o 24 22 b10 28 h5 185 i/o - 65 l18 83 n9 316 i/o - 23 a9 29 j2 188 i/o - - l17 84 m9 319 i/o - - l16 85 l9 322 i/o 46 66 m18 86 n10 325 xc4010/xc4010d pinouts o (m1) i (m0) i (m2) ?? * indicates unconnected package pins. ** the following bga225 balls are connected to ground: f8, g7, g8, g9, h6, h7, h8, h9, h10, j7, j8, j9, k8 *** the following bg225 balls are unconnected: e3, e2, f1, f2, j5, k1, l2, k4, p5, l6, n7, p7, r10, p10, m10, n11, n15, m14, l15, k12, g10, e15, e14, f12, f9, d11, c10, b10, c6, f7, a3, c4 ? contributes only one bit (.i) to the boundary scan register. ?? xc4010 only. pg191 package not available for xc4010d
2-63 xc4010/xc4010d pinouts (continued) * indicates unconnected package pins. ** the following bga225 balls are connected to ground: f8, g7, g8, g9, h6, h7, h8, h9, h10, j7, j8, j9, k8 *** the following bg225 balls are unconnected: e3, e2, f1, f2, j5, k1, l2, k4, p5, l6, n7, p7, r10, p10, m10, n11, n15, m14, l15, k12, g10, e15, e14, f12, f9, d11, c10, b10, c6, f7, a3, c4 ?? xc4010 only. pg 191 package not available for xc4010d boundary scan bit 0 = tdo.t boundary scan bit 1 = tdo.o boundary scan bit 487 = bscan.upd ?? pin *** boundary pin *** boundary description pc84 pq160 pg191 pq208 bg225 scan order description pc84 pq160 pg191 pq208 bg225 scam order i/o 47 67 m17 87 k9 328 i/o - - v 4 144 d15 460 i/o - 68 n18 88 r11 331 i/o - 111 u5 145 f11 463 i/o - 69 p18 89 p11 334 i/o - 112 t6 146 d14 466 gnd - 70 m16 90 ** - i/o (d1) 69 113 v 3 147 e12 469 i/o - - n17 91 r12 337 i/o (rclk-busy/rdy ) 70 114 v 2 148 c15 472 i/o - - r18 92 l10 340 i/o - 115 u4 149 d13 475 i/o - 71 t18 93 p12 343 i/o - 116 t5 150 c14 478 i/o - 72 p17 94 m11 346 i/o (d0, din) 71 117 u3 151 f10 481 i/o 48 73 n16 95 r13 349 sgck4 (dout, i/o) 72 118 t4 152 b15 484 i/o 49 74 t17 96 n12 352 cclk 73 119 v1 153 c13 - i/o - 75 r17 97 p13 355 vcc 74 120 r4 154 b14 - i/o - 76 p16 98 k10 358 - - - - 155* - - i/o 50 77 u18 99 r14 361 - - - - 156* - - sgck3 (i/o) 51 78 t16 100 n13 364 - - - - 157* - - gnd 52 79 r16 101 ** - - - - - 158* - - - - - - 102* - - td0 75 121 u2 159 a15 - done 53 80 u17 103 p14 - gnd 76 122 r3 160 d12 - - - - - 104* - - i/o (a0, ws) 77 123 t3 161 a14 2 - - - - 105* - - pgck4 (i/o, a1) 78 124 u1 162 b13 5 vcc 54 81 r15 106 r15 - i/o - 125 p3 163 e11 8 - - - - 107* - - i/o - 126 r2 164 c12 11 prog 55 82 v18 108 m12 - i/o (cs1, a2) 79 127 t2 165 a13 14 i/o (d7) 56 83 t15 109 p15 367 i/o (a3) 80 128 n3 166 b12 17 pgck3 (i/o) 57 84 u16 110 n14 370 i/o - 129 p2 167 a12 20 i/o - 85 t14 111 l11 373 i/o - 130 t1 168 c11 23 i/o - 86 u15 112 m13 376 i/o - - r1 169 b11 26 i/o (d6) 58 87 v17 113 j10 379 i/o - - n2 170 e10 29 i/o - 88 v16 114 l12 382 gnd - 131 m3 171 ** - i/o - 89 t13 115 m15 385 i/o - 132 p1 172 a11 32 i/o - 90 u14 116 l13 388 i/o - 133 n1 173 d10 35 i/o - - v15 117 l14 391 i/o (a4) 81 134 m2 174 a10 38 i/o - - v14 118 k11 394 i/o (a5) 82 135 m1 175 d9 41 gnd - 91 t12 119 ** - i/o - - l3 176 c9 44 i/o - 92 u13 120 k13 397 i/o - 136 l2 177 b9 47 i/o - 93 v13 121 k14 400 i/o - 137 l1 178 a9 50 i/o (d5) 59 94 u12 122 k15 403 i/o - 138 k1 179 e9 53 i/o (cso) 60 95 v12 123 j12 406 i/o (a6) 83 139 k2 180 c8 56 i/o - - t11 124 j13 409 i/o (a7) 84 140 k3 181 b8 59 i/o - - u11 125 j14 412 gnd 1 141 k4 182 a8 - i/o - 96 v11 126 j15 415 i/o - 97 v10 127 j11 418 i/o (d4) 61 98 u10 128 h13 421 i/o 62 99 t10 129 h14 424 vcc 63 100 r10 130 h15 - gnd 64 101 r9 131 ** - i/o (d3) 65 102 t9 132 h12 427 i/o (rs) 66 103 u9 133 h11 430 i/o - 104 v 9 134 g14 433 i/o - 105 v 8 135 g15 436 i/o - - u8 136 g13 439 i/o - - t8 137 g12 442 i/o (d2) 67 106 v 7 138 g11 445 i/o 68 107 u7 139 f15 448 i/o - 108 v 6 140 f14 451 i/o - 109 u6 141 f13 454 gnd - 110 t7 142 ** - i/o - - v 5 143 e13 457
2-64 XC4000 logic cell array family xc4013/xc4013d pinouts * indicates unconnected package pins. ? contributes only one bit (.i) to the boundary scan register. pin boundary pin boundary description pq160 mq208 pg223 bg225 pq240 scan order description pq160 mq208 pg223 bg225 pq240 scan order vcc 142 183 j4 a10 212 - i/o 21 27 c10 h6 31 218 i/o (a8) 143 184 j3 e8 213 74 i/o 22 28 b10 h3 32 221 i/o (a9) 144 185 j2 f8 214 77 i/o 23 29 a9 j6 33 224 i/o 145 186 j1 b7 215 80 i/o 24 30 a10 h4 34 227 i/o 146 187 h1 a7 216 83 i/o - 31 a11 j1 35 230 i/o - 188 h2 g7 217 86 i/o - 32 c11 j5 36 233 i/o - 189 h3 e7 218 89 - ----37* - - - - - - 219* - i/o - - d11 j2 38 236 i/o (a10) 147 190 g1 f7 220 92 i/o - - d12 j7 39 239 i/o (a11) 148 191 g2 c7 221 95 vcc - - - k1 40 - vcc - - - - 222 - i/o 25 33 b11 j3 41 242 i/o - - h4 b6 223 98 i/o 26 34 a12 k2 42 245 i/o - - g4 e6 224 101 i/o 27 35 b12 k5 43 248 i/o 149 192 f1 d7 225 104 i/o 28 36 a13 k3 44 251 i/o 150 193 e1 f6 226 107 gnd 29 37 c12 l1 45 - gnd 151 194 g3 a5 227 - i/o - - d13 k6 46 254 i/o - 195 f2 b5 228 110 i/o - - d14 l2 47 257 i/o - 196 d1 d5 229 113 i/o - 38 b13 j4 48 260 i/o 152 197 c1 c5 230 116 i/o - 39 a14 m2 49 263 i/o 153 198 e2 c6 231 119 i/o 30 40 a15 l5 50 266 i/o (a12) 154 199 f3 a4 232 122 i/o 31 41 c13 m1 51 269 i/o (a13) 155 200 d2 d4 233 125 i/o 32 42 b14 h3 52 272 i/o - - f4 b4 234 128 i/o 33 43 a16 l3 53 275 i/o - - e4 c3 235 131 i/o 34 44 b15 m4 54 278 i/o 156 201 b1 a3 236 134 i/o 35 45 c14 n1 55 281 i/o 157 202 e3 c2 237 137 i/o 36 46 a17 n2 56 284 i/o (a14) 158 203 c2 d6 238 140 sgck2 (i/o) 37 47 b16 k4 57 287 sgck1 (a15, i/o) 159 204 b2 a2 239 143 o (m1) 38 48 c15 l4 58 290 vcc 160 205 d3 a6 240 - gnd 39 49 d15 41 59 - - - 206* - - - - i (m0) 40 50 a18 p1 60 293? - - 207* - - - - - - 51* - - - - - - 208* - - - - - - 52* - - - - - - 1*--- - - -53*--- - gnd 1 2 d4 a1 1 - - - 54* - - - - - - 3*--- - vcc 41 55 d16 r6 61 - pgck1 (a16,i/o) 2 4 c3 b1 2 146 i (m2) 42 56 c16 r2 62 294? i/o (a17) 3 5 c4 b3 3 149 pgck2 (i/o) 43 57 b17 p3 63 295 i/o 4 6 b3 c4 4 152 i/o (hdc) 44 58 e16 m6 64 298 i/o 5 7 c5 b2 5 155 i/o 45 59 c17 p2 65 301 i/o (tdi) 6 8 a2 c1 6 158 i/o 46 60 d17 r3 66 304 i/o (tck) 7 9 b4 e3 7 161 i/o 47 61 b18 n3 67 307 i/o 8 10 c6 d2 8 164 i/o (ldc) 48 62 e17 n5 68 310 i/o 9 11 a3 d3 9 167 i/o 49 63 f16 n4 69 313 i/o - 12 b5 d1 10 170 i/o 50 64 c18 r4 70 316 i/o - 13 b6 e5 11 173 i/o - 65 d18 p4 71 319 i / o - - d5 f4 12 176 i/o - 66 f17 n6 72 322 i/o - - d6 e2 13 179 i/o - - e15 p5 73 325 gnd 10 14 c7 e1 14 - i/o - - f15 m5 74 328 i/o 11 15 a4 e4 15 182 gnd 51 67 g16 r5 75 - i/o 12 16 a5 f3 16 185 i/o 52 68 e18 m7 76 331 i/o (tms) 13 17 b7 f2 17 188 i/o 53 69 f18 p6 77 334 i/o 14 18 a6 f5 18 191 i/o 54 70 g17 l6 78 337 vcc - - - f1 19 - i/o 55 71 g18 n7 79 340 i/o - - d7 g4 20 194 vcc ----80 - i/o - - d8 g2 21 197 i/o - 72 h16 p7 81 343 - - - - - 22* - i/o - 73 h17 m8 82 346 i/o - 19 c8 g3 23 200 - ----83* - i/o - 20 a7 g6 24 203 i/o - - g15 k7 84 349 i/o 15 21 b8 g5 25 206 i/o - - h15 l7 85 352 i/o 16 22 a8 g1 26 209 i/o 56 74 h18 r7 86 355 i/o 17 23 b9 h5 27 212 i/o 57 75 j18 n8 87 358 i/o 18 24 c9 h7 28 215 i/o 58 76 j17 j8 88 361 gnd 19 25 d9 h1 29 - i/o (err, init) 59 77 j16 p8 89 364 vcc 20 26 d10 h2 30 - vcc 60 78 j15 r10 90 -
2-65 xc4013/xc4013d pinouts (continued) boundary scan bit 0 = tdo.t boundary scan bit 1 = tdo.o boundary scan bit 583 = bscan.upd * indicates unconnected package pins. pin boundary pin boundary description pq160 mq208 pg223 bg225 pq240 scan order description pq160 mq208 pg223 bg225 pq240 scan order gnd 61 79 k15 r8 91 - gnd 101 131 r9 h15 151 - i/o 62 80 k16 l8 92 367 i/o (d3) 102 132 t9 h10 152 511 i/o 63 81 k17 m9 93 370 i/o (rs) 103 133 u9 g12 153 514 i/o 64 82 k18 p9 94 373 i/o 104 134 v 9 g14 154 517 i/o 65 83 l18 r9 95 376 i/o 105 135 v 8 g15 155 520 i/o - 84 l17 k8 96 379 i/o - 136 u8 g9 156 523 i/o - 85 l16 l9 97 382 i/o - 137 t8 g11 157 526 - ----98* - - ---- 158* - i/o - - l15 k9 99 385 i/o (d2) 106 138 v 7 g10 159 529 i/o - - m15 n9 100 388 i/o 107 139 u7 g13 160 532 vcc ----101 - vcc - - - - 161 - i/o 66 86 m18 p10 102 391 i/o 108 140 v 6 f14 162 535 i/o 67 87 m17 l10 103 394 i/o 109 141 u6 f11 163 538 i/o 68 88 n18 n10 104 397 i/o - - r8 f13 164 541 i/o 69 89 p18 k10 105 400 i/o - - r7 f10 165 544 gnd 70 90 m16 r11 106 - gnd 110 142 t7 e15 166 - i/o - - n15 n11 107 403 i / o - - r6 e14 167 547 i/o - - p15 p11 108 406 i/o - - r5 f12 168 550 i/o - 91 n17 m10 109 409 i/o - 143 v 5 d14 169 553 i/o - 92 r18 p12 110 412 i/o - 144 v 4 e12 170 556 i/o 71 93 t18 r12 111 415 i/o 111 145 u5 d15 171 559 i/o 72 94 p17 n12 112 418 i/o 112 146 t6 d13 172 562 i/o 73 95 n16 k12 113 421 i/o (d1) 113 147 v 3 e13 173 565 i/o 74 96 t17 p13 114 424 i/o (rclk-busy/rdy) 114 148 v2 c13 174 568 i/o 75 97 r17 r13 115 427 i/o 115 149 u4 c15 175 571 i/o 76 98 p16 p14 116 430 i/o 116 150 t5 c14 176 574 i/o 77 99 u18 k13 117 433 i/o (d0, din) 117 151 u3 d10 177 577 sgck3 (i/o) 78 100 t16 m13 118 0 sgck4 (dout, i/o) 118 152 t4 c11 178 580 gnd 79 101 r16 r15 119 - cclk 119 153 v1 b15 179 - - - 102* - - - - vcc 120 154 r4 f15 180 - done 80 103 u17 r14 120 - - - 155* - - - - - - 104* - - - - -- 156* - - - - - - 105* - - - - -- 157* - - - - vcc 81 106 r15 k15 121 - -- 158* - - - - - - 107* - - - - td0 121 159 u2 a14 181 - prog 82 108 v18 p15 122 - gnd 122 160 r3 a15 182 - i/o (d7) 83 109 t15 n14 123 439 i/o (a0, ws) 123 161 t3 c12 183 2 pgck3 (i/o) 84 110 u16 l13 124 442 pgck4 (i/o, a1) 124 162 u1 c10 184 5 i/o 85 111 t14 n13 125 445 i/o 125 163 p3 b14 185 8 i/o 86 112 u15 n15 126 448 i/o 126 164 r2 a13 186 11 i/o - - r14 m11 127 451 i/o (cs1, a2) 127 165 t2 b13 187 14 i/o - - r13 m14 128 454 i/o (a3) 128 166 n3 b12 188 17 i/o (d6) 87 113 v17 m12 129 457 i/o - - p4 d12 189 20 i/o 88 114 v16 m15 130 460 i/o - - n4 a12 190 23 i/o 89 115 t13 l11 131 463 i/o 129 167 p2 e11 191 26 i/o 90 116 u14 j12 132 466 i/o 130 168 t1 d9 192 29 i/o - 117 v15 l14 133 469 i/o - 169 r1 b11 193 32 i/o - 118 v14 l12 134 472 i/o - 170 n2 d11 194 35 gnd 91 119t12l15135 - - ---- 195* - i/o - - r12 j13 136 475 gnd 131 171 m3 a11 196 - i/o - - r11 k14 137 478 i/o 132 172 p1 c9 197 38 i/o 92 120 u13 k11 138 481 i/o 133 173 n1 b10 198 41 i/o 93 121 v13 h11 139 484 i/o - - m4 e10 199 44 vcc - - - - 140 - i/o - - l4 d8 200 47 i/o (d5) 94 122 u12 j14 141 487 vcc - - - - 201 - i/o (cso) 95 123 v12 h12 142 490 i/o (a4) 134 174 m2 b9 202 50 - ---- 143* - i/o (a5) 135 175 m1 c8 203 53 i/o - 124 t11 j10 144 493 - ---- 204* - i/o - 125 u11 j11 145 496 i/o - 176 l3 f9 205 56 i/o 96 126 v11 j15 146 499 i/o 136 177 l2 e9 206 59 i/o 97 127 v10 h13 147 502 i/o 137 178 l1 a9 207 62 i/o (d4) 98 128 u10 j9 148 505 i/o 138 179 k1 b8 208 65 i/o 99 129 t10 h9 149 508 i/o (a6) 139 180 k2 h8 209 68 vcc 100 130 r10 h14 150 - i/o (a7) 140 181 k3 g8 210 71 gnd 141 182 k4 a8 211 -
2-66 XC4000 logic cell array family ? contributes only one bit (.i) to the boundary scan register. xc4020 pinouts pin bound pin bound pin bound description hq208 hq240 pg233 pg299 scan description hq208 hq240 pg233 pg299 scan description hq208 hq240 pg233 pg299 scan vcc 183 212 j4 k1 - i/o 34 42 a12 c13 287 i/o - - - r17 487 i/o (a8) 184 213 j3 k2 86 i/o 35 43 b12 b14 290 i/o - - - t18 490 i/o (a9) 185 214 j2 k3 89 i/o 36 44 a13 d13 293 i/o 95 113 n16 u19 493 i/o 186 215 j1 k5 92 gnd 37 45 c12 a15 - i/o 96 114 t17 v19 496 i/o 187 216 h1 k4 95 i/o - 46 d13 c14 296 i/o 97 115 r17 r16 499 i/o 188 217 h2 j1 98 i/o - 47 d14 a17 299 i/o 98 116 p16 t17 502 i/o 189 218 h3 j2 101 i/o 38 48 b13 d14 302 i/o 99 117 u18 u18 505 i/o (a10) 190 220 g1 h1 104 i/o 39 49 a14 b16 305 sgck3 (i/o) 100 118 t16 x20 508 i/o (a11) 191 221 g2 j3 107 i/o 40 50 a15 c15 308 gnd 101 119 r16 w20 - i/o - - - h2 110 i/o 41 51 c13 e14 311 done 103 120 u17 v18 - i/o - - - g1 113 i/o - - - a18 314 vcc 106 121 r15 x19 - vcc - 222 - e1 - i/o - - - d15 317 prog 108 122 v18 u17 - i/o - 223 h4 h3 116 i/o 42 52 b14 c16 320 i/o (d7) 109 123 t15 w19 511 i/o - 224 g4 g2 119 i/o 43 53 a16 b17 323 pgck3 (i/o) 110 124 u16 w18 514 i/o 192 225 f1 h4 122 i/o 44 54 b15 b18 326 i/o 111 125 t14 t15 517 i/o 193 226 e1 f2 125 i/o 45 55 c14 e15 329 i/o 112 126 u15 u16 520 gnd 194 227 g3 f1 - i/o 46 56 a17 d16 332 i/o - 127 r14 v17 523 i/o 195 228 f2 d1 128 scgk2 (i/o) 47 57 b16 c17 335 i/o - 128 r13 x18 526 i/o 196 229 d1 g4 131 o (m1) 48 58 c15 a20 338 i/o - - - u15 529 i/o 197 230 c1 e2 134 gnd 49 59 d15 a19 - i/o - - - t14 532 i/o 198 231 e2 f3 137 i (m0) 50 60 a18 c18 341 i/o (d6) 113 129 v17 w17 535 i/o (a12) 199 232 f3 g5 140 vcc 55 61 d16 b20 - i/o 114 130 v16 v16 538 i/o (a13) 200 233 d2 c1 143 i (m2) 56 62 c16 d17 342 i/o 115 131 t13 x17 541 i/o - - - f4 146 pgck2 (i/o) 57 63 b17 b19 343 i/o 116 132 u14 u14 544 i/o - - - e3 149 i/o (hdc) 58 64 e16 c19 346 i/o 117 133 v15 v15 547 i/o - 234 f4 d2 152 i/o 59 65 c17 f16 349 i/o 118 134 v14 t13 550 i/o - 235 e4 c2 155 i/o 60 66 d17 e17 352 gnd 119 135 t12 x16 - i/o 201 236 b1 f5 158 i/o 61 67 b18 d18 355 i/o - 136 r12 u13 553 i/o 202 237 e3 e4 161 i/o (ldc) 62 68 e17 c20 358 i/o - 137 r11 v14 556 i/o (a14) 203 238 c2 d3 164 i/o - - - f17 361 i/o 120 138 u13 w14 559 sgck1(a15,i/o) 204 239 b2 c3 167 i/o - - - g16 364 i/o 121 139 v13 v13 562 vcc 205 240 d3 a2 - i/o 63 69 f16 d19 367 vcc - 140 - x15 - gnd 2 1 d4 b1 - i/o 64 70 c18 e18 370 i/o (d5) 122 141 u12 t12 565 pgck1 (a16,i/o) 4 2 c3 d4 170 i/o 65 71 d18 d20 373 i/o (cs0) 123 142 v12 x14 568 i/o (a17) 5 3 c4 b2 173 i/o 66 72 f17 g17 376 i/o - - - x13 571 i/o 6 4 b3 b3 176 i/o - 73 e15 f18 379 i/o - - - v12 574 i/o 7 5 c5 e6 179 i/o - 74 f15 h16 382 i/o 124 144 t11 w12 577 i/o (tdi) 8 6 a2 d5 182 gnd 67 75 g16 e20 - i/o 125 145 u11 t11 580 i/o (tck) 9 7 b4 c4 185 i/o 68 76 e18 h17 385 i/o 126 146 v11 x12 583 i/o - - - a3 188 i/o 69 77 f18 g18 388 i/o 127 147 v10 u11 586 i/o - - - d6 191 i/o 70 78 g17 g19 391 i/o (d4) 128 148 u10 v11 589 i/o 10 8 c6 e7 194 i/o 71 79 g18 h18 394 i/o 129 149 t10 w11 592 i/o 11 9 a3 b4 197 vcc - 80 - f20 - vcc 130 150 r10 x10 - i/o 12 10 b5 c5 200 i/o 72 81 h16 j16 397 gnd 131 151 r9 x11 - i/o 13 11 b6 a4 203 i/o 73 82 h17 g20 400 i/o (d3) 132 152 t9 w10 595 i/o - 12 d5 d7 206 i/o - - - h20 403 i/o (rs) 133 153 u9 v10 598 i/o - 13 d6 c6 209 i/o - - - j18 406 i/o 134 154 v9 t10 601 gnd 14 14 c7 a5 - i/o - 84 g15 j19 409 i/o 135 155 v8 u10 604 i/o 15 15 a4 b6 212 i/o - 85 h15 k16 412 i/o 136 156 u8 x9 607 i/o 16 16 a5 d8 215 i/o 74 86 h18 j20 415 i/o 137 157 t8 w9 610 i/o (tms) 17 17 b7 c7 218 i/o 75 87 j18 k17 418 i/o - - - x8 613 i/o 18 18 a6 b7 221 i/o 76 88 j17 k18 421 i/o - - - v9 616 vcc - 19 - a6 - i/o (err, init) 77 89 j16 k19 424 i/o (d2) 138 159 v7 w8 619 i/o - 20 d7 c8 224 vcc 78 90 j15 l20 - i/o 139 160 u7 x7 622 i/o - 21 d8 e9 227 gnd 79 91 k15 k20 - vcc - 161 - x5 - i/o - - - b8 230 i/o 80 92 k16 l19 427 i/o 140 162 v6 v8 625 i/o - - - a8 233 i/o 81 93 k17 l18 430 i/o 141 163 u6 w7 628 i/o 19 23 c8 c9 236 i/o 82 94 k18 l16 433 i/o - 164 r8 u8 631 i/o 20 24 a7 b9 239 i/o 83 95 l18 l17 436 i/o - 165 r7 w6 634 i/o 21 25 b8 e10 242 i/o 84 96 l17 m20 439 gnd 142 166 t7 x6 - i/o 22 26 a8 a9 245 i/o 85 97 l16 m19 442 i/o - 167 r6 x4 637 i/o 23 27 b9 d10 248 i/o - - - n20 445 i/o - 168 r5 u7 640 i/o 24 28 c9 c10 251 i/o - - - m18 448 i/o 143 169 v5 w5 643 gnd 25 29 d9 a10 - i/o - 99 l15 n19 451 i/o 144 170 v4 v6 646 vcc 26 30 d10 a11 - i/o - 100 m15 p20 454 i/o 145 171 u5 t7 - i/o 27 31 c10 b10 254 vcc - 101 - t20 - i/o 146 172 t6 x3 649 i/o 28 32 b10 b11 257 i/o 86 102 m18 n18 457 i/o (d1) 147 173 v3 u6 652 i/o 29 33 a9 c11 260 i/o 87 103 m17 p19 460 i/o (rclk-busy/rdy) 148 174 v2 v5 655 i/o 30 34 a10 e11 263 i/o 88 104 n18 n17 463 i/o - - - w4 658 i/o 31 35 a11 d11 266 i/o 89 105 p18 r19 466 i/o - - - w3 661 i/o 32 36 c11 a12 269 gnd 90 106 m16 r20 - i/o 149 175 u4 t6 664 i/o - - - b12 272 i/o - 107 n15 u20 469 i/o 150 176 t5 u5 667 i/o - - - a13 275 i/o - 108 p15 p17 472 i/o (d0, din) 151 177 u3 v4 670 i/o - 38 d11 e12 278 i/o 91 109 n17 t19 475 sgck4 (dout, i/o) 152 178 t4 x1 673 i/o - 39 d12 b13 281 i/o 92 110 r18 r18 478 cclk 153 179 v1 v3 - vcc - 40 - a16 - i/o 93 111 t18 p16 481 vcc 154 180 r4 w1 - i/o 33 41 b11 a14 284 i/o 94 112 p17 v20 484 tdo 159 181 u2 u4 -
2-67 pin pg m q pg hq bound pin pg m q pg hq bound pin pg m q pg hq bound pin pg m q pg hq bound description 223 240 299 304 scan description 223 240 299 304 scan description 223 240 299 304 scan description 223 240 299 304 scan vcc j4 212 k1 38 - vcc - 19 a6 - - i/o d17 66 e17 223 400 i/o p17 112 v20 163 556 i/o (a8) j 3 2 1 3 k2 3 7 9 8 i/o d7 2 0 c8 2 8 0 2 5 4 i/o b18 6 7 d18 2 2 2 4 0 3 i/o - - r17 1 6 2 5 5 9 i/o (a9) j 2 2 1 4 k3 3 6 1 0 1 i/o d8 2 1 e9 2 7 9 2 5 7 i/o (ldc) e17 6 8 c20 2 2 1 4 0 6 i/o - - t18 1 6 1 5 6 2 i/o j1 215 k5 35 104 gnd - 22 - - - i/o - - f17 220 409 i/o n16 113 u19 160 565 i/o h1 216 k4 34 107 i/o - - a7 278 260 i/o - - g16 219 412 i/o t17 114 v19 159 568 i/o h2 217 j1 33 110 i/o - - d9 277 263 i/o f16 69 d19 218 415 i/o r17 115 r16 158 571 i/o h3 218 j2 32 113 i/o - - b8 276 266 i/o c18 70 e18 217 418 i/o p16 116 t17 157 574 gnd - 219 - - - i/o - - a8 275 269 i/o d18 71 d20 216 421 i/o u18 117 u18 156 577 i/o (a10) g1 2 2 0 h1 3 1 1 1 6 i/o c8 2 3 c9 2 7 4 2 7 2 i/o f17 7 2 g17 2 1 5 4 2 4 sgck3 (i/o) t16 1 1 8 x20 1 5 5 5 8 0 i/o (a11) g2 2 2 1 j 3 3 0 1 1 9 i/o a7 2 4 b9 2 7 3 2 7 5 i/o e15 7 3 f18 2 1 4 4 2 7 vcc r16 - t16 154 - i/o - - j4 29 122 i/o b8 25 e10 272 278 i/o f15 74 h16 213 430 gnd - 119 w20 - - i / o - - j 5 2 8 1 2 5 i / o a 8 2 6 a 9 2 7 1 2 8 1 i / o - - e 1 9 2 1 2 4 3 3 done u 1 7 1 2 0 v 1 8 1 5 3 - i/o - - h2 27 128 i/o b9 27 d10 270 284 i/o - - f19 211 436 vcc r15 121 x19 152 - i/o - - g1 26 131 i/o c9 28 c10 269 287 gnd g 1 6 7 5 e 2 0 2 1 0 - prog v 1 8 1 2 2 u 1 7 1 5 1 - vcc - 222 e1 25 - gnd d9 2 9 a10 2 6 8 - i/o e18 7 6 h17 2 0 9 4 3 9 i/o (d7) t15 1 2 3 w19 1 5 0 5 8 3 i/o h4 223 h3 23 134 vcc d10 3 0 a11 2 6 7 - i/o f18 7 7 g18 2 0 8 4 4 2 pgck3 (i/o) u16 1 2 4 w 1 8 1 4 9 5 8 6 i/o g4 224 g2 22 137 i/o c10 31 b10 266 290 i/o g17 78 g19 207 445 i/o t14 125 t15 148 589 i/o f1 225 h4 21 140 i/o b10 32 b11 265 293 i/o g18 79 h18 206 448 i/o u15 126 u16 147 592 i/o e1 226 f2 20 143 i/o a9 33 c11 264 296 vcc - 80 f20 204 - i/o r14 127 v17 146 595 gnd g3 227 f1 19 - i/o a10 34 e11 263 299 i/o h16 81 j16 203 451 i/o r13 128 x18 145 598 i/o - - h5 18 146 i/o a11 35 d11 262 302 i/o h17 82 g20 202 454 i/o - - u15 144 601 i/o - - g3 17 149 i/o c11 36 a12 261 305 gnd - 83 - - - i/o - - t14 143 604 i/o f2 2 2 8 d1 1 6 1 5 2 i/o - - b12 2 6 0 3 0 8 i/o - - j 1 7 2 0 1 4 5 7 i/o (d6) v17 1 2 9 w17 1 4 2 6 0 7 i/o d1 229 g4 15 155 i/o - - a13 259 311 i/o - - h19 200 460 i/o v16 130 v16 141 610 i/o c1 230 e2 14 158 i/o - - c12 258 314 i/o - - h20 199 463 i/o t13 131 x17 140 613 i/o e2 231 f3 13 161 i/o - - d12 257 317 i/o - - j18 198 466 i/o u14 132 u14 139 616 i/o (a12) f3 2 3 2 g5 1 2 1 6 4 gnd - 37 - - - i/o g15 84 j19 197 469 i/o v15 133 v15 138 619 i/o (a13) d2 2 3 3 c1 1 0 1 6 7 i/o d11 3 8 e12 2 5 6 3 2 0 i/o h15 8 5 k16 1 9 6 4 7 2 i/o v14 1 3 4 t13 1 3 7 6 2 2 i/o - - f4 9 170 i/o d12 39 b13 255 323 i/o h18 86 j20 195 475 i/o - - w16 136 625 i/o - - e3 8 173 vcc - 40 a16 - - i/o j18 87 k17 194 478 i/o - - w15 135 628 i/o f4 234 d2 7 176 i/o b11 41 a14 252 326 i/o j17 88 k18 193 481 gnd t12 135 x16 134 - i/o e4 2 3 5 c2 6 1 7 9 i/o a12 4 2 c13 2 5 1 3 2 9 i/o (err, init) j 1 6 8 9 k19 1 9 2 4 8 4 i/o r12 1 3 6 u13 1 3 3 6 3 1 i/o b1 236 f5 5 182 i/o b12 43 b14 250 332 vcc j15 90 l20 191 - i/o r11 137 v14 132 634 i/o e3 237 e4 4 185 i/o a13 44 d13 249 335 gnd k15 91 k20 190 - i/o u13 138 w14 131 637 i/o (a14) c2 2 3 8 d3 3 1 8 8 gnd c12 45 a15 248 - i/o k16 92 l19 189 487 i/o v13 139 v13 130 640 sgck1 (a15, i/o) b 2 2 3 9 c3 2 1 9 1 i/o - - b 1 5 2 4 7 3 3 8 i/o k 1 7 9 3 l 1 8 1 8 8 4 9 0 vcc - 140 x15 - - vcc d3 2 4 0 a2 1 - i/o - - e13 2 4 6 3 4 1 i/o k18 9 4 l16 1 8 8 4 9 3 i/o (d5) u12 1 4 1 t12 1 2 7 6 4 3 gnd d4 1 b1 3 0 4 - i/o d13 4 6 c14 2 4 5 3 4 4 i/o l18 9 5 l17 1 8 7 4 9 6 i/o (cs0) v12 1 4 2 x14 1 2 6 6 4 6 pgck1 (a16, i/o) c3 2 d4 3 0 3 1 9 4 i/o d14 4 7 a17 2 4 4 3 4 7 i/o l 1 7 9 6 m 2 0 1 8 5 4 9 9 gnd - 143 - - - vcc - - e5 - - i/o b 1 3 4 8 d14 2 4 3 3 5 0 i/o l 1 6 9 7 m 1 9 1 8 4 5 0 2 i/o - - u12 1 2 5 6 4 9 i/o (a17) c4 3 b2 3 0 2 1 9 7 i/o a14 4 9 b16 2 4 2 3 5 3 i/o - - n20 1 8 3 5 0 5 i/o - - w 1 3 1 2 4 6 5 2 i/o b 3 4 b 3 3 0 1 2 0 0 i/o a15 5 0 c15 2 4 1 3 5 6 i/o - - m 1 8 1 8 2 5 0 8 i/o - - x13 1 2 3 6 5 5 i/o c5 5 e6 3 0 0 2 0 3 i/o c13 5 1 e14 2 4 0 3 5 9 i/o - - m 1 7 1 8 1 5 1 1 i/o - - v12 1 2 2 6 5 8 i/o (tdi) a2 6 d5 2 9 9 2 0 6 i/o - - a18 2 3 9 3 6 2 i/o - - m16 1 8 0 5 1 4 i/o t11 1 4 4 w 1 2 1 2 1 6 6 1 i/o (tck) b4 7 c4 2 9 8 2 0 9 i/o - - d15 2 3 8 3 6 5 gnd l 1 5 9 8 - 1 7 9 - i/o u11 1 4 5 t11 1 2 0 6 6 4 i/o - - a3 2 9 7 2 1 2 i/o b 1 4 5 2 c16 2 3 7 3 6 8 i/o m 1 5 9 9 n19 1 7 8 5 1 7 i/o v11 1 4 6 x12 1 1 9 6 6 7 i/o - - d6 2 9 6 2 1 5 i/o a16 5 3 b 1 7 2 3 6 3 7 1 i/o - 1 0 0 - - 5 2 0 i/o v10 1 4 7 u11 1 1 8 6 7 0 i/o c6 8 e7 295 218 i/o b15 54 b18 235 374 vcc - 1 0 1 t20 1 7 7 - i/o (d4) u10 1 4 8 v11 1 1 7 6 7 3 i/o a3 9 b4 294 221 i/o c14 55 e15 234 377 i/o m18 102 n18 175 523 i/o t10 149 w11 116 676 i/o b5 10 c5 293 224 i/o a17 56 d16 233 380 i/o m17 103 p19 174 526 vcc r10 150 x10 115 - i/o b 6 1 1 a4 2 9 2 2 2 7 scgk2 (i/o) b 1 6 5 7 c17 2 3 2 3 8 3 i/o n18 1 0 4 n17 1 7 3 5 2 9 gnd r9 151 x11 114 - i/o d5 1 2 d7 2 9 1 2 3 0 o (m1) c15 5 8 a20 2 3 1 3 8 6 i/o p18 1 0 5 r19 1 7 2 5 3 2 i/o (d3) t9 1 5 2 w10 1 1 3 6 7 9 i/o d6 13 c6 290 233 gnd d15 5 9 a19 230 - gnd m 1 6 1 0 6 r20 1 7 1 - i/o (rs) u9 1 5 3 v10 1 1 2 6 8 2 i/o - - e8 2 8 9 2 3 6 i (m0) a18 6 0 c18 2 2 9 389? i/o - - n16 170 535 i/o v9 154 t10 111 685 i/o - - b5 288 239 vcc d16 61 b20 228 - i/o - - p18 169 538 i/o v8 155 u10 110 688 gnd c7 1 4 a5 2 8 7 - i (m2) c16 6 2 d17 2 2 7 390? i/o n15 107 u20 168 541 i/o u8 156 x9 109 691 i/o a4 1 5 b6 2 8 6 2 4 2 pgck2 (i/o) b17 6 3 b19 2 2 6 3 9 1 i/o p15 1 0 8 p17 1 6 7 5 4 4 i/o t8 1 5 7 w 9 1 0 8 6 9 4 i/o a5 1 6 d8 2 8 5 2 4 5 i/o (hdc) e16 6 4 c19 2 2 5 3 9 4 i/o n17 1 0 9 t19 1 6 6 5 4 7 i/o - - x8 1 0 7 6 9 7 i/o (tms) b7 1 7 c7 2 8 4 2 4 8 gnd - - e16 - - i/o r18 110 r18 165 550 i/o - - v9 106 700 i/o a6 18 b7 283 251 i/o c17 65 f16 224 397 i/o t18 111 p16 164 553 i/o - - u9 105 703 pin bound pin bound pin bound description hq208 hq240 pg233 pg299 scan description hq208 hq240 pg233 pg299 scan description hq208 hq240 pg233 pg299 scan gnd 160 182 r3 x2 - i/o 167 191 p2 u1 32 i/o - - - p1 59 i/o (a0, ws) 161 183 t3 w2 2 i/o 168 192 t1 p4 35 i/o (a4) 174 202 m 2 n1 62 pgck4 (i/o, a1) 162 184 u1 v2 5 i/o 169 193 r1 r3 38 i/o (a5) 175 203 m 1 m 3 65 i/o 163 185 p3 r5 8 i/o 170 194 n2 n5 41 i/o 176 205 l3 m2 68 i/o 164 186 r2 t4 11 gnd 171 196 m3 t1 - i/o 177 206 l2 l5 71 i/o (cs1, a2) 165 187 t2 u3 14 i/o 172 197 p1 n4 44 i/o 178 207 l1 m 1 74 i/o (a3) 166 188 n3 v1 17 i/o 173 198 n1 p3 47 i/o 179 208 k1 l4 77 i/o - - - r4 20 i/o - 199 m 4 p2 50 i/o (a6) 180 209 k2 l3 80 i/o - - - p5 23 i/o - 200 l4 n3 53 i/o (a7) 181 210 k3 l2 83 i/o - 189 p4 u2 26 vcc - 201 - r1 - gnd 182 211 k4 l1 - i/o - 190 n4 t3 29 i/o - - - m5 56 xc4025 pinouts boundary scan bit 0 = tdo.t boundary scan bit 1 = tdo.o boundary scan bit 775 = bscan.upd xc4020 pinouts (continued)
2-68 XC4000 logic cell array family for a detailed description of the device architecture, see pages 2-9 through 2-31. for a detailed description of the configuration modes and their timing, see pages 2-32 through 2-55. for detailed lists of package pinouts, see pages 2-57 through 2-67. for package physical dimensions and thermal data, see section 4. ordering information xc4025 pinouts (continued) component availability example: xc4010-5pg191c device type temperature range number of pins speed grade package type pins 84 100 120 144 156 160 164 191 196 208 223 225 240 299 304 top top top type plast. plast. plast. brazed ceram. plast. ceram plast. brazed ceram. brazed plast. metal ceram. plast. plast. metal ceram. ceram. plcc pqfp vqfp cqfp pga tqfp pga pqfp cqfp pga cqfp pqfp pqfp pga bga pqfp pqfp pga pga code pc84 pq100 vq100 cb100 pg120 tq144 pg156 pq160 cb164 pg191 cb196 pq208 mq208 pg223 bg225 pq240 mq240 pg299 hq304 -6 c i c i c i xc4003 -5 cc c -4 cc c -10 m b m b -6 c i c i c i m b c i m b c i xc4005 -5 c i c i c i c i c i -4 cc cc c -6 c i c i c i c i xc4006 -5 c i c i c i c i -4 cccc -6 c i c i c i c i c i xc4008 -5 c i c i c c i c i -4 c cccc -10 m b m b xc4010 -6 c i c i c i m b m b c i c i c i -5 c i c i c i c i c i c i -4 c ccccc -6 c i c i c i c i xc4010d -5 c i c i c i c i -4 c ccc -6 c i c i c i c i (m b) c i c i c i xc4013 -5 c i c ic ic ic ic ic i -4 c cccccc -6 c i c i c i c i xc4013d -5 c i c i c i c i -4 cccc -6 (c i) (c i) (c i) (c i) xc4020 -5 (c i) (c i) (c i) (c i) -4 (c) (c) (c) (c) -6 c i c i c i c xc4025 -5 c i c i c i c -4 c = commercial = 0 to +85 c i = industrial = -40 to +100 c m = mil temp = -55 to +125 c b = mil-std-883c class b parentheses indicates future product plans pin pg m q pg hq bound pin pg m q pg hq bound pin pg m q pg hq bound pin pg m q pg hq bound description 223 240 299 304 scan description 223 240 299 304 scan description 223 240 299 304 scan description 223 240 299 304 scan i/o - - t9 104 706 i/o t6 172 x3 87 745 i/o r2 186 t4 71 11 i/o l4 200 n3 54 59 gnd - 1 5 8 - - - i/o (d1) v3 1 7 3 u6 8 6 7 4 8 i/o (cs1, a2) t2 1 8 7 u3 7 0 1 4 vcc - 201 r1 52 - i/o (d2) v7 1 5 9 w8 1 0 3 7 0 9 i/o (rclk-busy/rdy) v2 1 7 4 v5 8 5 7 5 1 i/o (a3) n3 1 8 8 v1 6 9 1 7 i/o - - m 5 5 1 6 2 i/o u7 160 x7 102 712 i/o - - w4 84 754 i/o - - r4 68 20 i/o - - p1 50 65 vcc - 161 x5 - - i/o - - w3 83 757 i/o - - p5 67 23 i/o - - m4 49 68 i/o v6 162 v8 99 715 i/o u4 175 t6 82 760 i/o p4 189 u2 66 26 i/o - - n2 48 71 i/o u6 1 6 3 w7 9 8 7 1 8 i/o t5 1 7 6 u5 8 1 7 6 3 i/o n4 1 9 0 t3 6 5 2 9 i/o (a4) m 2 2 0 2 n1 4 7 7 4 i/o r8 1 6 4 u8 9 7 7 2 1 i/o (d0, din) u3 1 7 7 v4 8 0 7 6 6 i/o p2 1 9 1 u1 6 4 3 2 i/o (a5) m 3 2 0 3 m 3 4 6 7 7 i/o r7 1 6 5 w 6 9 6 7 2 4 sgck4 (dout, i/o) t4 1 7 8 x1 7 9 7 6 9 i/o t1 1 9 2 p 4 6 3 3 5 gnd - 204 - - - gnd t 7 1 6 6 x 6 9 5 - cclk v 1 1 7 9 v 3 7 8 - i / o r 1 1 9 3 r 3 6 2 3 8 i / o l 3 2 0 5 m 2 4 5 8 0 i/o - - t8 9 4 727 gnd - - t5 - - i/o n2 194 n5 61 41 i/o l2 206 l5 44 83 i/o - - v7 9 3 730 vcc r4 180 w1 77 - i/o - 195 t2 60 44 i/o l1 207 m1 43 86 i/o r6 167 x4 92 733 tdo u2 181 u4 76 i/o - - r2 59 47 i/o k1 208 l4 42 89 i/o r5 168 u7 91 736 gnd r3 182 x2 75 - gnd m 3 1 9 6 t1 5 8 - i/o (a6) k2 2 0 9 l3 4 1 9 2 i/o v5 1 6 9 w 5 9 0 7 3 9 i/o (a0, ws) t3 1 8 3 w 2 7 4 2 i/o p1 1 9 7 n4 5 7 5 0 i/o (a7) k3 2 1 0 l2 4 0 9 5 i/o v4 1 7 0 v6 8 9 7 4 2 pgck4 (i/o, a1) u1 1 8 4 v2 7 3 5 i/o n1 1 9 8 p 3 5 6 5 3 gnd k4 211 l1 39 - i/o u5 171 t7 8 8 - i/o p3 185 r5 7 2 8 i/o m4 199 p2 5 5 5 6

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